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  ? semiconductor components industries, llc, 2002 february, 2002 rev. 2 1 publication order number: nsl12tt1/d nsl12tt1 high current surface mount pnp silicon low v ce(sat) transistor for battery operated applications maximum ratings (t a = 25 c) rating symbol max unit collector-emitter voltage v ceo 12 vdc collector-base voltage v cbo 20 vdc emitter-base voltage v ebo 4.0 vdc collector current peak collector current continuous i c 1.0 0.5 adc electrostatic discharge esd hbm class 3b mm class c thermal characteristics characteristic symbol max unit total device dissipation t a = 25 c derate above 25 c p d (note 1) 210 1.7 mw mw/ c thermal resistance, junction to ambient r q ja (note 1) 595 c/w total device dissipation t a = 25 c derate above 25 c p d (note 2) 365 2.9 mw mw/ c thermal resistance, junction to ambient r q ja (note 2) 340 c/w thermal resistance, junction to lead #3 r q jl 205 c/w junction and storage temperature range t j , t stg 55 to +150 c 1. fr4 @ minimum pad 2. fr4 @ 1.0 x 1.0 inch pad device package shipping ordering information nsl12tt1 sot416 http://onsemi.com 3000/tape & reel device marking collector 3 1 base 2 emitter 12 volts 1.0 amps pnp transistor l2 case 463 sot416/sc75 style 1 3 2 1 l2 = specific device code
nsl12tt1 http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typical max unit off characteristics collectoremitter breakdown voltage (i c = 10 madc, i b = 0) v (br)ceo 12 18 vdc collectorbase breakdown voltage (i c = 0.1 madc, i e = 0) v (br)cbo 20 28 vdc emitterbase breakdown voltage (i e = 0.1 madc, i c = 0) v (br)ebo 4.0 7.0 vdc collector cutoff current (v cb = 12 vdc, i e = 0) i cbo 0.03 0.1  adc collectoremitter cutoff current (v ces = 9 vdc) i ces 0.03 0.1  adc emitter cutoff current (v eb = 4.0 vdc) i ebo 0.01 0.1  adc on characteristics dc current gain (note 3) (i c = 100 ma, v ce = 1.0 v) (i c = 100 ma, v ce = 2.0 v) (i c = 500 ma, v ce = 2.0 v) h fe 150 150 100 200 200 150 collectoremitter saturation voltage (note 3) (i c = 50 ma, i b = 0.5 ma) (i c = 100 ma, i b = 1.0 ma) (i c = 250 ma, i b = 2.5 ma) (i c = 250 ma, i b = 5.0 ma) (i c = 500 ma, i b = 5.0 ma) (i c = 500 ma, i b = 50 ma) (i c = 1.0 a, i b = 100 ma) v ce(sat) 0.070 0.110 0.190 0.165 0.300 0.210 0.410 0.110 0.150 0.240 0.370 v baseemitter saturation voltage (note 3) (i c = 150 ma, i b = 20 ma) v be(sat) 0.81 0.90 v baseemitter turnon voltage (note 3) (i c = 150 ma, v ce = 3.0 v) v be(on) 0.81 0.875 v input capacitance (v eb = 0 v, f = 1.0 mhz) c ibo 52 pf output capacitance (v cb = 0 v, f = 1.0 mhz) c obo 30 pf turnon time (i bi = 50 ma, i c = 500 ma, r l = 3.0 w ) t on 50 ns turnoff time (i b1 = i b2 = 50 ma, i c = 500 ma, r l = 3.0 w ) t off 80 ns 3. pulsed condition: pulse width = 300  sec, duty cycle 2% figure 1.
nsl12tt1 http://onsemi.com 3 v be(sat) , base emitter saturation voltage (v) 1 0.1 0.01 300 200 100 0 600 t a = 55 c 25 c 125 c 0.001 500 v ce = 1.0 v 400 0.2 0 0.4 0.6 0.8 1 1.2 0.1 0.01 1 0.001 0.1 0.1 0.01 0.001 i c , collector current (amps) figure 1. collector emitter saturation voltage vs. collector current figure 2. collector emitter saturation voltage vs. collector current v ce(sat) , collector emitter saturation voltage (v) figure 3. dc current gain i c , collector current (amps) figure 4. collector emitter saturation voltage vs. collector current i c , collector current (amps) v ce(sat) , collector emitter saturation voltage (v) h fe , dc current gain figure 5. collector emitter saturation voltage vs base current i c , collector current (amps) 1 0.001 0.1 1 0.001 0.1 0.01 1 0.1 0.01 1 0.001 0.1 0.01 1 i c , collector current (amps) 0.01 1 t a = 25 c i c = 1.0 a 500 ma 100 ma 50 ma 10 ma 5.0 ma figure 6. base emitter saturation voltage vs. collector current 1 0.1 1 0.01 0.001 0.0001 0.00001 0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0.1 i b , base current (amps) v ce(sat) , collector emitter saturation voltage (v) v ce(sat) , collector emitter saturation voltage (v) 0.01 i c /i b = 200 100 50 10 t a = 25 c 25 c t a = 125 c 55 c i c /i b = 100 i c /i b = 50 25 c t a = 125 c 55 c 25 c t a = 125 c 55 c 250 ma
nsl12tt1 http://onsemi.com 4 0.001 0.4 0.1 0.01 0 1.2 0.2 0.6 0.8 1 1 14 6 4 2 25 20 15 10 35 0 30 12 10 8 f = 1 mhz i e = 0 a t a = 25 c 55 50 45 40 35 30 6 3 2 1 0 20 f = 1 mhz i c = 0 a t a = 25 c 5 4 25 v eb , emitter base voltage figure 7. base emitter turnon voltage vs. collector current figure 8. input capacitance c ibo , input capacitance v cb , collector base voltage c obo , output capacitance i c , collector current (amps) figure 9. output capacitance v ce = 3.0 v 25 c t a = 125 c 55 c v be(on) , base emitter turnon voltage (v) r(t), effective transient thermal resistance (normalized) t 1 , time (s) figure 10. normalized thermal response 0.1 1 0.01 single pulse 0.0001 0.001 0.01 0.1 1 10 1000 d = 0.50 d = 0.20 d = 0.10 d = 0.05 d = 0.01 p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 copper area = 0.048 square inches r q ja = 505.7 c/w 100
nsl12tt1 http://onsemi.com 5 1.4 1 0.5 min. (3x) 0.5 min. (3x) typical 0.5 soldering pattern unit: mm p d = t j(max) t a r q ja p d = 150 c 25 c 833 c/w = 150 milliwatts ? the soldering temperature and time should not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient should be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied dur- ing cooling * soldering a device without preheating can cause exces- sive thermal shock and stress which can result in damage to the device. information for using the sot416 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection sot416/sc90 power dissipation the power dissipation of the sot416/sc90 is a func- tion of the pad size. this can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. power dissipation for a surface mount device is determined by t j(max) , the maximum rated junction tem- perature of the die, r q ja , the thermal resistance from the device junction to ambient; and the operating temperature, t a . using the values provided on the data sheet, p d can be calculated as follows. the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 125 milliwatts. the 833 c/w assumes the use of the recommended foot- print on a glass epoxy printed circuit board to achieve a power dissipation of 150 milliwatts. another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad ? . using a board material such as thermal clad, a higher power dissipation can be achieved using the same footprint. interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference should be a maximum of 10 c.
nsl12tt1 http://onsemi.com 6 step 1 preheat zone 1 ramp" step 2 vent soak" step 3 heating zones 2 & 5 ramp" step 4 heating zones 3 & 6 soak" step 5 heating zones 4 & 7 spike" step 6 vent step 7 cooling 200 c 150 c 100 c 50 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies 100 c 150 c 160 c 140 c figure 11. typical solder heating profile desired curve for high mass assemblies 170 c for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones, and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 11 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems but it is a good starting point. factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. solder stencil guidelines prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. a solder stencil is required to screen the optimum amount of solder paste onto the footprint. the stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. the stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. typical solder heating profile the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints.
nsl12tt1 http://onsemi.com 7 package dimensions sc75/sot416 case 46301 issue b dim min max min max inches millimeters a 0.70 0.80 0.028 0.031 b 1.40 1.80 0.055 0.071 c 0.60 0.90 0.024 0.035 d 0.15 0.30 0.006 0.012 g 1.00 bsc 0.039 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 1.45 1.75 0.057 0.069 l 0.10 0.20 0.004 0.008 s 0.50 bsc 0.020 bsc notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. m 0.20 (0.008) b a b s d g 3 pl 0.20 (0.008) a k j l c h 3 2 1 style 1: pin 1. base 2. emitter 3. collector
nsl12tt1 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. nsl12tt1/d thermal clad is a trademark of the bergquist company. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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